Cadence Design Systems, Inc.


Cadence Design Systems is the world's leading EDA company. Cadence customers use our software, hardware, and services to overcome a range of technical and economic hurdles.
Our technologies help customers create mobile devices with longer battery life. Designers of ICs for game consoles and other consumer electronics speed their products to market using our hardware simulators to run software on a ‘virtual’ chip—long before the actual chip exists. We bridge the traditional gap between chip designers and fabrication facilities, so that manufacturing challenges can be addressed early in the design stage. And our custom IC design platform enables designers to harmonize the divergent worlds of analog and digital design to create some of the most advanced mixed-signal system on chip (SoC) designs.




Product Name: Allegro Design Entry HDL
Product Category: PCB Design and Analysis - PCB Design Tools

Cadence® Allegro® Design Entry HDL is an enterprise-enabled design creation solution that allows schematic designers to capture complex designs quickly and efficiently. It provides advanced productivity features such as reuse of previous schematic designs as blocks or sheets—partially or completely.

Product Name: Allegro® AMS Simulator
Product Category: PCB Design and Analysis - PCB Design Tools

Cadence® Allegro® AMS Simulator includes PSpice® technology at the core, providing fast and accurate simulations. This Advanced Analysis package includes utilities for sensitivity analysis, goal-based multi-parameter optimization, component stress and reliability analysis, and Monte Carlo analysis for yield estimation. The parametric plotter analyzes interdependence among parameters and converts simulation data into meaningful results.

Product Name: Allegro® Design Entry CIS
Product Category: PCB Design and Analysis - PCB Design Tools

The embedded library management in Cadence® Allegro® Design Entry CIS enables teams to share and reuse centralized parts information, reducing the effort spent researching and manually entering parts and block design data. Removing the need for multiple users to enter parts not only eliminates redundancy, but it also reduces divergence and errors in the design.

Product Name: Allegro® Design Workbench
Product Category: PCB Design and Analysis - PCB Design Tools

Valuable in workgroup environments, Cadence® Allegro® Design Workbench significantly improves productivity while reducing costly mistakes that are often introduced due to a lack of an unified environment. Common access to component information and preferred parts libraries speeds component selection and eliminates design errors due to flawed, obsolete, or non-preferred parts.

Product Name: Allegro® Package Designer
Product Category: PCB Design and Analysis - PCB Design Tools

Cadence® Allegro® Package Designer integrates with First Encounter® Silicon Virtual Prototyping to deliver chip-level I/O feasibility planning capabilities in an industry-proven co-design methodology. Data integration with First Encounter technology provides mask accuracy in the RDL routing and improves I/O padring optimization, substrate interconnect design, extraction, modeling, and signal integrity analysis. The final design output provides automatic system-level handoffs for PCB design.

Product Name: Allegro® Package SI
Product Category: PCB Design and Analysis - PCB Design Tools

Cadence® Allegro® Package SI performs direct read/write to the design database to achieve accurate prototyping without time-consuming setup, and directly incorporates the results. By providing key indicators early in the design process, it helps engineers make difficult tradeoff decisions. A graphical topology simulator/editor allows engineers to compare different electrical routing strategies, optimize design rules, and develop S-Parameter models.

Product Name: Allegro® PCB Design
Product Category: PCB Manufacturing - PCB Design Tools

With its comprehensive feature set, Cadence® Allegro® PCB Design offers the leading physical and electrical constraint-driven PCB layout and interconnect routing system. The fully integrated design flow includes design creation, library creation, placement, interactive routing and editing, automatic routing, and interfaces for manufacturing and mechanical CAD.

Product Name: Allegro® PCB SI
Product Category: PCB Design and Analysis - PCB Design Tools

Cadence® Allegro® PCB SI GXL provides a virtual prototyping environment for designs with signals operating in the multi-gigahertz (MGH) frequency range. It offers a completely integrated signal design and analysis solution built on top of the proven Allegro PCB SI environment.

Product Name: Allegro® System Architect
Product Category: PCB Design and Analysis - PCB Design Tools

Cadence® Allegro® System Architect’s spreadsheet editor performs especially well in designs involving large pin-count devices, multiple wide buses, FPGAs, and high pin-count differential connectors. Multi-style design entry allows designers to significantly accelerate the process by matching the method of capture to the characteristics of the design intent.

Product Name: Assura™ Design Rule Checker (DRC)
Product Category: Physical Verification - ASIC and IC Design

Cadence® Assura® Design Rule Checker (DRC) is part of the design verification suite of tools within the Virtuoso® custom design platform. Assura DRC is a full-featured tool that supports both interactive and batch operation modes and utilizes hierarchical processing for fast, efficient identification and correction of design rule errors in even the most advanced designs.

Product Name: Assura™ Layout vs. Schematic Verifier (LVS)
Product Category: Physical Verification - ASIC and IC Design

Cadence® Assura® Layout vs. Schematic (LVS) Verifier is part of the design verification suite of tools within the Virtuoso® custom design platform. Assura LVS ensures that the layout connectivity of the physical design matches the logical design represented by the schematic or netlist before tapeout. By automatically extracting devices and nets formed across layout hierarchy and comparing them to the schematic netlist, Assura LVS provides fast, efficient verification in both interactive and batch mode.

Product Name: C-to-Silicon Compiler
Product Category: Synthesis Place & Route - ASIC and IC Design

At the core of Cadence system-level design solutions, Cadence® C-to-Silicon Compiler automatically generates synthesizable RTL starting from untimed C/C++/SystemC® with as little as 10% of the effort required using manual methods.

Product Name: Cadence 3D Design Viewer
Product Category: Design Verification

Cadence® 3D Design Viewer provides a realistic visualization of how the design will look when fabricated. Engineers can pan and zoom in on the image from any angle to explore the design in detail. For design reviews, engineers can take a snapshot of the screen and use the built-in annotation tools to add shapes, arrows, and text. 3D Design Viewer also provides interactive 3D wirebond design rule checking.

Product Name: Cadence Chip Optimizer
Product Category: IC Physical Design Tools - ASIC and IC Design

Conventional IC implementation tools create oversimplified models of interconnect. Cadence® Chip Optimizer is a silicon-proven, full-chip physical design optimization system that improves manufacturability, yield, and performance. It optimizes layout based on electrical constraints, manufacturing rules, and timing objectives.

Product Name: Cadence InCyte Chip Estimator
Product Category: Documentation Tools - ASIC and IC Design

Decisions made during the architectural planning stages of the design cycle largely determine the chip’s resulting size, power consumption, performance, and cost. It’s during these early stages that design teams can realize the biggest benefits by considering and quantifying a variety of architectural options.

Product Name: Cadence OrCAD Capture / Capture CIS
Product Category: PCB Design and Analysis - PCB Design Tools

Easy-to-use and powerful, Cadence® OrCAD® Capture is the most widely used schematic design solution, supporting both flat and hierarchal designs from the simplest to the most complex. Seamless bi-directional integration with OrCAD PCB Editor enables data synchronization and cross-probing/placing between the schematic and the board design. OrCAD Capture allows designers to backannotate layout changes, make gate/pin swaps, and change component names or values from board design to schematic using the feedback process. It also comes with a large library of schematic symbols and can export netlists in a wide variety of formats.

Product Name: Cadence OrCAD PCB Designer
Product Category: PCB Design and Analysis - PCB Design Tools

Cadence® OrCAD® PCB Designer contains a fully integrated design flow that includes a constraint manager, design capture technology, component tools, a PCB editor, an auto/interactive router, and interfaces for manufacturing and mechanical CAD.

Product Name: Cadence QRC Extraction
Product Category: Design Verification

Cadence® QRC Extraction includes a full spectrum of technologies for all nanometer-scale design styles including RF, analog, mixed-signal, custom digital, and cell. These advanced capabilities include RLCK extraction, advanced process modeling, multi-corner and statistical extraction, distributed processing, netlist reduction, substrate parasitics extraction, an integrated field solver, and hierarchical extraction. With Cadence QRC Extraction, designers have an easy-to-use solution for rapid analysis to achieve faster timing closure and higher quality of silicon.

Product Name: Cadence SOC Functional Verification Kit
Product Category: Physical Verification - ASIC and IC Design

To reduce risk, achieve predictable verification closure, and deliver innovative products on time, engineers need automated verification process management, IP reuse, and the latest verification methodologies . The Cadence® SoC Functional Verification Kit provides higher levels of automation with reusable advanced verification techniques. It addresses both hardware and software verification, from block to chip to system levels, and low-power functional verification of the RTL.

Product Name: Cadence® SiP Digital Architect
Product Category: Web-based Design Tools

Cadence® SiP Digital Architect manages the conceptual design flow from die to system-level SiP. It integrates with Encounter® digital design databases in a bi-directional flow for co-design optimization. SiP Digital Architect makes it possible to rapidly author a system-level SiP connectivity model for feasibility and verification studies. This enables engineers to maximize the functional density and performance of the package, and to minimize power consumption. SiP Digital Architect also performs IC I/O padring/array co-design with optimization capabilities at the IC, substrate, and system levels.

Product Name: Cadence® SiP Digital Layout
Product Category: Web-based Design Tools

Cadence® SiP Digital Layout is the physical co-design and place-and-route solution for complex 3D SiP package design. Supporting all package interconnect strategies and combinations, SiP Digital Layout provides constraint-driven layout of the package substrate. Since it must operate in a 3D world, SiP Digital Layout allows stack assembly optimization with 3D layout and editing.

Product Name: Cadence® SiP Digital SI
Product Category: Web-based Design Tools

Cadence® SiP Digital SI creates a co-simulation environment directly with the SiP design database to perform accurate signal prototyping and interconnect extraction without time-consuming setup and translation. A graphical topology simulator/editor allows engineers to compare different electrical routing strategies, optimize design rules, and develop S-Parameter models.

Product Name: Cadence® SiP RF Architect
Product Category: Web-based Design Tools

Cadence® SiP RF Architect provides a full-featured mixed-signal design flow and design exploration environment for multiple chip and discrete component integration. Working directly with the Virtuoso® RF/analog chip design environment, SiP RF Architect provides full circuit simulation of multi-technology chips and the IC package substrate, including the characterization of embedded passive devices.

Product Name: Cadence® SiP RF Layout
Product Category: Web-based Design Tools

Cadence® SiP RF Layout performs the physical detailed implementation of package-level SiP substrate designs created using SiP RF Architect and Virtuoso® technology. It enables die stack creation, supports flip-chip and wirebond attachment in a 3D environment, and performs final connectivity optimization.

Product Name: Cadence® Physical Verification System
Product Category: Physical Verification - ASIC and IC Design

Cadence® Physical Verification System (PVS) is the premier Cadence solution for SoC signoff. It integrates with industry-standard digital and custom design flows, enabling designers to procure a front-to-back design and signoff flow from a single EDA vendor. PVS also facilitates a “one tool, one deck” model for digital and custom design that minimizes support overhead.

Product Name: Cadence® RF SiP Methodology Kit
Product Category: Web-based Design Tools

The Cadence RF SiP Methodology Kit provides a complete SiP development platform along with the latest proven methodologies for RF and mixed-signal SiP design.

Product Name: Cadence® Space-based Router
Product Category: Cell & Block Characterization - ASIC and IC Design

Growing design complexity and more digital and analog/mixed-signal content mean designers face critical yield and manufacturability challenges, such as lithography issues, inconsistent manufacturing rules, copper materials, electrical concerns, and performance requirements. Cadence® Space-Based Router addresses all these concerns simultaneously, helping designers achieve shorter time to convergence, better quality of silicon, and differentiated products for consumer and wireless markets.

Product Name: Encounter Conformal Constraint Designer
Product Category: Design Verification

Encounter Conformal Constraint Designer automates the generation, validation, and refinement of constraints to ensure that timing constraints are valid throughout the entire design process, helping designers achieve rapid timing closure.

Product Name: Encounter Test Architect
Product Category: Design for Test - ASIC and IC Design

With its power-aware, unified methodology for specifying, inserting, and verifying full-chip tests, Encounter Test Architect helps logic design teams minimize cost of test.

Product Name: Encounter® RTL Compiler
Product Category: Synthesis - ASIC and IC Design

Encounter RTL Compiler allows engineers to look across the entire design as they employ concurrent optimization techniques, such as making tradeoffs among timing, area, and power.

Product Name: Encounter® Timing System
Product Category: Timing Analysis - ASIC and IC Design

Encounter Timing System serves both front-end logic designers looking for high-quality timing analysis and ease of use, as well as back-end implementation engineers requiring electrical analysis and a common timing engine for silicon-accurate signoff.

Product Name: First Encounter Silicon Virtual Prototyping
Product Category: Synthesis Place & Route - ASIC and IC Design

First Encounter Silicon Virtual Prototyping brings more predictability to the design process. It provides a clear path to synthesize to a full-chip virtual prototype and helps analyze full-chip routing effects—right at the beginning of the design cycle.

Product Name: Incisive Enterprise Specman Elite®
Product Category: Design Verification

Part of the Cadence® Incisive® functional verification platform, Incisive Enterprise Specman products blend leading-edge process automation technology with the comprehensive Plan-to-Closure Methodology to simplify and speed verification. Specman® products automate the entire verification process, from individual blocks to full chips to the project level. With Specman technology, designers benefit from increased productivity and a predictable path to high-quality silicon.

Product Name: Incisive Palladium® series
Product Category: Design Verification

The Cadence® Incisive® Palladium® series delivers high system throughput, verification automation, and advanced debug to perform plan- and metric-driven system-level hardware/software co-verification. Capable of handling chip designs of up to 256 million gates, it also enables software to be developed and verified on a real hardware implementation using live data.

Product Name: Incisive Xtreme series
Product Category: Design Verification

The Cadence® Incisive® Xtreme® series of high-performance, high-capacity accelerators/emulators speeds the functional verification of designs at the behavioral, RTL, and gate levels. Designed for multi-user, multi-site, multi-purpose systems, the Xtreme series integrates with the Incisive simulation environment to perform advanced verification planning and drive coverage-based, metric-driven verification closure.

Product Name: Incisive® Formal Verifier
Product Category: Design Verification

Cadence® Incisive® Formal Verifier allows design teams to start RTL block verification months earlier than when using traditional simulation-based techniques. Its formal, assertion-based approach and exhaustive analysis capabilities ensure verification quality by pinpointing the source of bugs and detecting the corner-case errors that other methods often miss.

Product Name: NanoRoute Router
Product Category: Synthesis Place & Route - ASIC and IC Design

NanoRoute Router shifts DFM awareness into the implementation phase, where engineers can maximize changes at minimal cost. It optimizes routing for signal integrity, timing, and DFM while still maintaining the utmost in speed and capacity.

Product Name: PSpice A/D and Advanced Analysis
Product Category: Physical Verification - ASIC and IC Design

Cadence® PSpice® A/D is the de-facto industry-standard Spice-based simulator for system design. It simulates complex mixed-signal designs containing both analog and digital parts, and it supports a wide range of simulation models such as IGBTs, pulse width modulators, DACs, and ADCs. Its built-in mathematical functions and behavioral modeling techniques enable fast and accurate simulation of designs with efficient debugging. PSpice A/D also allows users to design and generate simulation models for transformers and DC inductors.

Product Name: SoC Encounter RTL-to-GDSII System
Product Category: Synthesis Place & Route - ASIC and IC Design

The SoC Encounter System provides fast and flexible feasibility analysis, giving engineers an early, accurate view of whether the most complex designs will meet their targets and be physically realizable. It offers the latest low-power design and yield capabilities and provides a predictable path to design closure.

Product Name: Virtuoso custom design platform GXL
Product Category: Web-based Design Tools

The Cadence® Virtuoso® custom design platform is the industry’s leading design system for complete front-to-back analog, RF, mixed-signal, and custom digital design. The GXL tier comprises the platform’s most advanced configuration of design and analysis technologies, including expanded physical design capabilities and an enhanced simulation environment.

Product Name: Virtuoso custom design platform L
Product Category: Web-based Design Tools

The Cadence® Virtuoso® custom design platform L represents the entry-level configuration of the industry’s leading design system for complete front-to-back analog, RF, mixed-signal, and custom digital design. It delivers a number of updated capabilities and design flow enhancements that offer solutions for all common custom IC design requirement.

Product Name: Virtuoso custom design platform XL
Product Category: Web-based Design Tools

The Cadence® Virtuoso® custom design platform XL family of products extends the L family to provide higher levels of design assistance to the end user. The platform includes Virtuoso Schematic Editor XL, Virtuoso Analog Design Environment XL, and Virtuoso Layout Suite XL.

Product Name: Virtuoso Layout Migrate
Product Category: IC Physical Design Tools - ASIC and IC Design

Cadence® Virtuoso® Layout Migrate is the physical layout migration tool within the Cadence Virtuoso custom design environment. It supports fast process and design rule migration of hard IP, custom digital designs, mixed-signal blocks, memories, and standard cell libraries.

Product Name: Virtuoso NeoCircuit Circuit Sizing & Optimization
Product Category: IC Physical Design Tools - ASIC and IC Design

Cadence® Virtuoso® NeoCircuit performs automatic circuit sizing and optimization for custom digital, RF, and mixed-signal circuits. Integrated with the Virtuoso custom design platform, Virtuoso NeoCircuit leverages the Virtuoso Schematic Editor and employs the designer’s simulator of choice to size, bias, and verify circuits interactively with a manual starting point or automatically without any starting point. 

Product Name: Virtuoso® AMS Designer Simulator
Product Category: Analog & Mixed Signal Simulators - ASIC and IC Design

Cadence® Virtuoso® AMS Designer is a mixed-signal simulation solution for the design and verification of analog, RF, memory, and mixed-signal SoCs. It is integrated with the Virtuoso full-custom environment for mixed-signal design and verification. It is also integrated with the Cadence Incisive® functional verification platform for mixed-signal verification within the digital verification environment.

Product Name: Virtuoso® Analog ElectronStorm™ Option
Product Category: Physical Verification - ASIC and IC Design

The Cadence® Virtuoso® Analog ElectronStorm® Option adds signal electromigration to the Virtuoso custom design platform. This option to the Virtuoso Analog Design Environment addresses electromigration validation for analog designs, which is especially important because signal electromigration is an increasing concern for analog designers using high-powered transistors or advanced process technologies.

Product Name: Virtuoso® Analog VoltageStorm™ Option
Product Category: Physical Verification - ASIC and IC Design

The Cadence® Virtuoso® Analog VoltageStorm® Option adds IR drop and power rail electromigration to the Virtuoso custom design platform. This option to the Virtuoso Analog Design Environment extends the VoltageStorm family of power integrity products to analog designs, where power rail electromigration and IR drop on power and ground rails are increasing concerns for analog designers.

Product Name: Virtuoso® Chip Assembly Router
Product Category: IC Physical Design Tools - ASIC and IC Design

Cadence® Virtuoso® Chip Assembly Router is the custom block and chip authoring routing tool of the Virtuoso platform. As a constraint- and design rule-driven interactive and fully automatic shape-based router, it supports block authoring and chip authoring solutions for custom digital, mixed-signal, and analog designs at any level of the hierarchy—transistor, cell, block, and chip, as well as advanced chip interconnect.

Product Name: Virtuoso® Chip Editor
Product Category: IC Physical Design Tools - ASIC and IC Design

Cadence® Virtuoso® Chip Editor is the centerpiece of the Virtuoso custom design platform’s full-chip integration component. It provides high-performance editing for full-chip finishing tasks and can handle even your largest designs. Virtuoso Chip Editor is fully interoperable with the Cadence Encounter® digital IC design platform and it leverages the industry-standard Virtuoso Layout Editor environment and infrastructure for layout productivity when you need it most—at tapeout.

Product Name: Virtuoso® Multi-mode Simulation
Product Category: Analog & Mixed Signal Simulators - ASIC and IC Design

Cadence® Virtuoso® Multi-Mode Simulation meets the changing simulation needs of designers as they progress through the design cycle--from architecture exploration to analog and RF block-level development and to final analog and mixed-signal full-chip verification.

Product Name: Virtuoso® Schematic Editor
Product Category: IC Physical Design Tools - ASIC and IC Design

Cadence® Virtuoso® Schematic Editor provides numerous capabilities to facilitate fast and easy design entry, including design assistants that speed common tasks by as much as 5x. Well-defined component libraries allow faster design at both the gate and transistor levels. Sophisticated wire routing capabilities further assist in connecting devices.

Product Name: Virtuoso® Spectre® Circuit Simulator
Product Category: Analog & Mixed Signal Simulators - ASIC and IC Design

Cadence® Virtuoso® Spectre® Circuit Simulator provides fast, accurate SPICE-level simulation for tough analog, radio frequency (RF) and mixed-signal circuits. It is tightly integrated with the Virtuoso custom design platform and provides detailed transistor-level analysis in multiple domains. Its superior architecture allows for low memory consumption and high-capacity analysis.

Product Name: Virtuoso® UltraSim Full-chip Simulator
Product Category: Analog & Mixed Signal Simulators - ASIC and IC Design

The Cadence® Virtuoso® UltraSim Full-Chip Simulator is a high-performance transistor-level FastSPICE circuit simulator for verifying large custom, analog/mixed-signal, RF, memory and SoC designs. It uses true hierarchical simulation with patented isomorphic and adaptive partitioning algorithms to provide the capacity, accuracy, and speed required for design and verification, regardless of design type or stage in the design cycle.

Product Name: VoltageStorm Power Verification
Product Category: Physical Verification - ASIC and IC Design

VoltageStorm Power Verification helps engineers manage power consumption by automating IR drop management, from initial power planning through signoff. By using it to verify the power grid before signal routing, engineers can eliminate over-design, open additional space for signal routing, and achieve timing closure more efficiently.


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San Jose, CA 95134
United States
Phone: 408-943-1234
Fax: 408-428-5001
Contact us
Url: http://www.cadence.com/us/pages/default.aspx



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