TransEDA Systems Ltd


European Union's 7th Framework Programme's collaborative research project FP7-2009-IST-4-248613 DIAMOND - Diagnosis, Error Modelling and Correction for Reliable Systems Design aims at improving the productivity and reliability of semiconductor and electronic systems design in Europe by providing a systematic methodology and an integrated environment for the diagnosis and correction of errors.

The project was launched in January 2010. With the total budget of 3.8M € the project encompasses an effort of 462.5 person months over a period of 3 years and is being coordinated by the research group led by Dr. Jaan Raik of Tallinn University of Technology, Estonia.




Product Name: Assertain-ABV
Product Category: Design Verification

Assertain is an innovative environment dedicated to measuring the completeness of the verification of digital SoC designs, in order to secure a faster and safer path to verification closure.

Product Name: Assertain-HDL
Product Category: Design Verification

Assertain HDL, the entry level of the Assertain product line, has been specially developed for design and verification engineers who need the best-in-class code coverage solution combined with test suite optimization capabilities and an extensive RTL analyzer.

Product Name: VN-Check
Product Category: Design Verification

VN-Check is a configurable HDL rule checker that analyzes a Verilog or VHDL design to provide clear, concise reports on problematic areas. Unlike basic rule checkers, VN-Check's rules can be configured at a very fine grain to match the design flow requirements.

Product Name: VN-Control
Product Category: Design Verification

an application-specific test automation tool that provides automatic test generation from a high-level template and automatic response checking for target applications.

Product Name: VN-Cover
Product Category: Design Verification

VN-Cover is a code and Finite State Machine coverage tool that identifies any unverified parts of a simulated HDL design. VN-Cover includes the most comprehensive set of metrics of the industry, among which line, statement, branch, condition, path, toggle, triggering, signal trace and FSM state, arc and path.

Product Name: VN-Cover Emulator
Product Category: Design Verification

VN-Cover Emulator enables engineers to obtain coverage on their SoCs in a hardware-accelerated environment and reach a level of confidence similar to that achieved using VN-Cover with software simulators. Using VN-Cover Emulator speeds up the overall verification task by providing better visibility on what has been covered, what is left, and when to stop verification.

Product Name: VN-Optimize
Product Category: Design Verification

-Optimize is a Test Suite Analysis and Optimization solution that: Dramatically cuts regression testing time by finding the optimal set of tests for the entire design, or selected instances or modules

Product Name: VN-Spec
Product Category: Design Verification

VN-Spec is a Specification Coverage and Impact Analysis solution that links design and verification flows to initial specification documents. VN-Spec brings a solid methodology for requirement management to project teams that need to get a more thorough vision of their SoC flow.


42 Venture West,
New Greenham Park,
Newbury, RG19 6HN,,
United Kingdom
Phone: +44-0-870-6260631
Fax: +44-0-870-6260631
Contact us
Url: http://www.transeda.com


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