Mentor Graphics® is a leader in electronic design automation. We enable companies to develop better electronic products faster and more cost-effectively. Our innovative products and solutions help engineers conquer design challenges in the increasingly complex worlds of board and chip design.
ADiT™ is an advanced fast-SPICE simulation tool specializing in analog and mixed-signal (AMS) transistor-level applications. It delivers accurate, reliable results 10X to 100X faster than traditional SPICE techniques for circuits with millions of transistors and devices.
Calibre DESIGNrev loads and displays multiple gigabyte GDSII and OASIS stream files in just minutes. Robust chip finishing capabilities allow full chip designers a method for merging, creating, verifying and comparing full chip data.
The Calibre® core processing engine continually evolves to meet thedemands of shrinking geometries and complex manufacturing methodologies.While traditional DRC methods of pass/no pass have served well for manyyears, simple compliance is no longer adequate to account for the variety andcomplexity of situations that occur in nanometer era processes.
Calibre® LVS, the market-leading layout vs. schematic physical verification tool, is tightly linked with both Calibre DRC and Calibre xRC to deliver production-proven device extraction for both physical verification and parasitic extraction. Calibre LVS performs a vital function as a member of a complete IC verification tool suite by providing device and connectivity comparisons between the IC layout and the schematic. Calibre's hierarchical processing engine runs Calibre LVS in tandem with Calibre DRC and Calibre xRC, supplying data for modifying the IC design to achieve superior functionality and reliability.
Delivers unparalleled performance on ASIC, memory, analog, SoC designs, etc. with no trade-off in accuracy. Single rule file can drive DRC, LVS, and Calibre xRC functionality. Reads LVS data structures to integrate parasitic information with intentional circuit elements. Model-based engine calculates intrinsic and coupling capacitances for all nets using the same high degree of accuracy.
Third generation RF IC algorithm highly optimized for both capacity and performance Multi-tone, steady-state analysis for large RF IC designs containing thousands of elements Modulated steady-state analysis and digitally modulated sources covering all wireless standards
FPGAs are widely used in many industries and applications. But, every FPGAmust ultimately reside on a PCB. Historically a manual process or numerous scripts were utilized to incorporate the FPGA into the PCB design. This process was satisfactory for smaller and less sophisticated devices, but, today’s FPGAs are powerful devices with high pin counts, numerous I/O standards, and high speed capabilities.
Mentor Graphics® ICX family of products provides an advanced design and verification environment for even the toughest high-speed challenges. The Interconnect Synthesis (IS) approach of integrating physical design with electrical verification provides a single environment for rules entry, what-if design exploration, timing-driven placement, electrically-driven routing and system verification.
Embedded memory continues to represent a larger portion of today’s challenging designs. Because of this trend, and the nature of a memory’s small geometries, implementing a sound memory testing strategy is one of the most significant design decisions.
Product Name: ModelSim
- FPGA and PLD Design Tools
ModelSim combines high performance and high capacity with the code coverage and debugging capabilities required to simulate larger blocks and systems and attain ASIC gate-level sign-off. Comprehensive support of Verilog, VHDL, and SystemC provide a solid foundation for single and multi-language design verification environments
Precision® RTL Plus provides a new way to design FPGAs — enabling every designer to improve productivity, reach desired performance fast and easily, and control the allocation of dedicated FPGA resources.
The Mentor Graphics Questa ADMS
™ (ADMS) simulator gives designers acomprehensive environment for verifying complex analog/mixed-signal (AMS)System-on-Chip (SoC) designs. ADMS combines four high performancesimulation engines in one efficient tool: Eldo™ for analog large-signal andfrequency domain simulations, ModelSim® for digital simulations, Mach™ for fasttransistor-level simulations and Eldo-RF™ for modulated steady state simulation.
Quiet Expert uses an "expert system" approach to finding problems on the board, highlighting where the exact problem lies, and giving real-world advice on how to remedy the problem. This is achieved quickly, without extensive simulation or modeling time, through the use of sophisticated algorithms and design rule checks.
Product Name: Seamless
- System Level Design (ESL)
Seamless enables users to debug hardware/software integration issues early in the design cycle by running embedded software on a simulation model of the embedded hardware. Seamless delivers full debug control and clear visibility of the interaction of hardware and software in your processor-based embedded design. Seamless provides an ideal platform for identifying critical HW/SW integration issues prior to the availability of an FPGA or silicon prototype.
The boundary scan logic can be accessed throughout the life of the IC, including manufacturing test at all package levels, silicon debug, and system verification. The result is both I/O cell defects and inter-IC board interconnect problems are detected before shipment, reducing field support costs and increasing customer satisfaction.
As process technologies migrate to sub- 100 nanometer, high quality test is a keyfactor for maintaining low defect rates. The TestKompress® product uses patented Embedded Deterministic Test (EDT™) technology to dramatically reduce the amount of test data required for today’s complex integrated circuits (ICs) while maintaining test quality. With up to a 100X reduction in test data volume and test time, compared to state-of-the-art scan and automatic test pattern generation (ATPG) methodologies, semiconductor manufacturers can dramatically increase the quantity and quality of tests they perform while controlling costs.
The Mentor Graphics® MUSBMHDRC is a multi-point high-speed dual role USB controller with a complete USB On-The-Go (OTG) capabilities for use in point-to-point communications with other OTG devices and host computers, as well as in multi-point communications with a network of USB 2.0 peripherals and hubs. The controller complies with both the USB standard for high-speed and full-speed functions and the OTG supplement to the USB 2.0 specification.