Averant is a startup electronic design automation (EDA) company focusing on verification of complex ICs and digital intellectual property (IP). The continuing growth in design complexity has caused a functional gap between what can be built and what can be verified before production. Finding mistakes after production can cost hundreds of millions of dollars, as seen with the Intel Pentium and the Toshiba floppy disk controller bugs. Averant closes the functional verification gap by delivering a new static verification technology that guarantees blocks used in design are functionally correct before production.




Product Name: SolidAC™
Product Category: Design Verification

SolidAC™  is a program that automatically checks a circuit for a number of common design problems. Reading only the design source, and with very little input from the user, AutoChecks tracks down such problems as clock domain crossing problems, and a host of other problems that cause a design to function improperly.

Product Name: Solidify™
Product Category: Design Verification

Solidify™ Static functional verification is a unique form of analysis applied to RTL design descriptions. The strength of this analysis is that it is exhaustive by nature, and quickly uncovers hidden design flaws and corner cases.

Product Name: SolidPC™
Product Category: Design Verification

AMBA compliance in a snap. Built upon formal technology, SolidPC employs a pre-defined set of technology rules to verify compliance with the AMBA protocol specification. SolidPC has an easy, flow-oriented interface, and requires no vectors to run. Leveraging the Solidify core engine, the tool efficiently executes a series of exhaustive proofs, automatically generating testbenches for rules that fail.

Product Name: SolidSEC
Product Category: Design Verification

SolidSEC verifies that two versions of a circuit are functionally equivalent after sequential optimizations are performed on one circuit. Examples of such optimizations are clock gating and retiming which occur during power reduction optimizations.

Product Name: SolidTC™
Product Category: Design Verification

Confidence with timing analysis. SolidTC is a timing constraint verifier that checks the validity of False-paths and Multi-cycle paths declared in an SDC file. Built upon the Solidify engine, it uses formal techniques to quickly and exhaustively verify correctness of these timing exceptions.

6775 Estates Drive
Oakland, CA 94611
United States
Phone: 510-922-8081
Fax: 510-922-8075
Contact us
Url: http://www.averant.com/index.html




Featured Video
Jobs
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Applications Engineer for intersil at Palm Bay, FL
Design Verification Engineer for intersil at Morrisville, NC
ASIC Hardware Engineer for BAE Systems Intelligence & Security at Arlington, VA
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, PA
Principle Electronic Design Engr for Cypress Semiconductor at San Jose, CA
Upcoming Events
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
DVCon US 2018 at Double Tree Hotel San Jose CA - Feb 26 - 1, 2018
5th EAI International Conference on Big data and Cloud Computing Challenges at Vandalur, Kelambakkam high road chennai Tamil Nadu India - Mar 8 - 9, 2018



Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise