ArchPro Design Automation Inc. (acquired by Synopsys)


Synopsys, Inc. (NASDAQ: SNPS), a world leader in semiconductor design software, today announced that it has acquired ArchPro Design Automation Inc. ArchPro's technologies enable engineers to address power management challenges in multi-voltage designs from chip architecture to RTL and gate-level design. These technologies allow verification of modern power management techniques such as power gating, substrate biasing, dynamic voltage and frequency scaling, and extend Synopsys' leadership in low power design and verification.




Product Name: ESP-CV™
Product Category: Design Verification

ESP-CV verifies that two different design representations are functionally equivalent. These designs may be described as Verilog behavioral models, RTL, UDP’s, gates, transistors, or SPICE netlist views.

Product Name: MVRC
Product Category: Design Verification

MVRC is a voltage-aware static checker that allows engineers to rapidly verify the designs that use voltage control techniques for power management. Additionally MVRC enables verification of the correct implementation of protection circuitry from an architectural and structural perspective.

Product Name: MVSIM
Product Category: Design Verification

MVSIM is the world’s first EDA solution for verification of power-managed designs and supports ARM® Intelligent Energy Manager (IEM) technology. Multi-voltage chip designers today have to settle for verification of power management schemes after the silicon has been created. Bugs are often found in power management schemes after silicon is spun causing time and cost-consuming revisions to silicon, system and software. MVSIM, for the first time, changes this paradigm to enable verification prior to silicon spins. MVSIM enables the user to bring any system level architectural decision on voltage scaling into RTL and verify it.


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Phone: 650-584-5000
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Url: http://www.synopsys.com/home.aspx


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