Alex is a founder of IP Cores, Inc. Prior to that, he was VP of Hardware Engineering in Metawave Communications, Director of Hardware Engineering at Guzik Technical Enterprises. Alex has more than 25 years of hardware development experience.
HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol.
The hardware components are fully synchronous and available as Verilog source. The software components are available in C language.
Implementation of the new LAN security standard IEEE 802.1ae (MACsec) requires the NIST standard AES cipher in the GCM mode for encryption and message authentication, as well as header parsing and formatting operations on the transmitted and received packets. The MSP1-PON core is tuned for Passive Optics Networks (PON) IEEE 802.1ae applications at the data rates of 10-100 Gbps.
Implementation of the IPsec security standard at high data rates requires the cryptographic processing acceleration. The ISP1-12.8 core is tuned for applications with the data rates of 1-6 Gbps (less for TripleDES).
The data stream through the control interface contains processing commands. Each command consists a pointer to the descriptor in the system memory. Descriptor contains source, destination, encryption context, processing length, and status.
The AES core implements Rijndael cipher encoding and decoding in compliance with the NIST Advanced Encryption Standard. It processes 128-bit data blocks with 128-bit key (a 256-bit key version is available).