Genesys Logic, Inc.


Genesys Logic specializes in the design, manufacturing, testing, and selling of ICs for PC peripherals and related products, and provides comprehensive solutions for consumer electronics and systems manufacturers. Our core competency lies in the development and application of high-speed SerDes technology. In addition to USB 3.0 technology, we have put a lot of effort into researching and developing high-speed SerDes interface technology to keep up with the trend of the new cross-disciplines and cross-platform technologies, and grasp the opportunities in the application markets.




Product Name: GL3520
Product Category: Physical Synthesis - Structured/Platform ASICs

GL3520 is a highly-compatible, high performance USB 3.0 hub controller, which integrates Genesys Logic own self-developed USB 3.0 Super Speed transmitter/receiver physical layer (PHY) and USB 2.0 High-Speed PHY. It supports Super Speed, Hi-Speed, and Full-Speed USB connections and is fully backward compatible to all USB 2.0 and USB 1.1 hosts. GL3520 is a premium 4 port MTT Hub solution, implementing multiple TT* (Note1) architecture that provide dedicated TT* to each downstream (DS) ports, which guarantee Full-Speed(FS) data passing bandwidth when multiple FS device perform heavy loading operations.

Product Name: GL9711
Product Category: Design for Test - ASIC and IC Design

The GL9711 is a 1-lane PCI Express PHY Layer Controller, which is compliant with PCI Express Base Specification rev. 1.0a and Intel's PHY Interface for the PCI Express Architecture rev. 1.0. It integrates one SerDes and the Physical Coding Sublayer (PCS) which performs 8b/10b encoding and decoding, elastic buffer and receiver detection, data serialization and deserialization. The SerDes in the GL9711 supports an effective serial interface speed (2.5 Gb/s) of data bandwidth, intended for use in ultrahigh-speed bi-directional data transmission system. The GL9711 can also be externally configured for various parallel bus width which is flexible and suitable for implementation.

Product Name: GL9714
Product Category: Physical Synthesis - Structured/Platform ASICs

The GL9714 is a 4-lane PCI Express PHY Layer Controller, which is compliant with PCI Express Base Specification rev. 1.0a and Intel’s PHY Interface for the PCI Express Architecture rev. 1.0. It integrates a quad SerDes and the Physical Coding Sublayer (PCS) which performs 8b/10b encoding and decoding, elastic buffer and receiver detection, data serialization and deserialization for each lane. The quad SerDes in the GL9714 supports an effective serial interface speed (2.5 Gb/s) of data bandwidth for each lane, intended for use in ultrahigh-speed bi-directional data transmission system. The GL9714 can also be externally configured for various combinations of lane number and parallel bus width which is flexible and suitable for x1, x2 or x4 lane implementation.


12F., No. 205, Sec. 3, Beixin Rd., Xindian
Dist. 231
New Taipei City
Taiwan
Phone: +886-2-8913-1888
Fax: +886-2-8913-1688
Contact us
Url: http://www.genesyslogic.com/
Aldec

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