Since 1990 ECC Technologies (ECC Tek) has licensed error correction (ECC) designs for data communications and storage. We supply our customers with solutions not only to conventional error correction needs, but also to the challenging needs of high-speed, wide-bandwidth, fault-tolerant systems. These solutions can be in the form of hardware or software designs, all customizable to fit customer's applications. Other services we provide are assistance with error correction need analysis, assistance with testing, and support throughout the implementation of a design
ECC Tek's existing binary BCH encoder and decoder designs for NAND Flash
correct t=7, 8, 14, 15, 17, or 18 bits in error in K-byte pages where K
can range from 512 to 546 bytes. Designs that allow other values for t
and K can quickly be developed. 4K-byte page sizes can be accommodated
by repeating 512-byte segments 8 times.
ECC Tek's patented Parallel RS (PRS) encoder and decoder designs are
used to design fault-tolerant parallel storage and communications
ECC Tek's existing Programmable RS encoder and decoder designs for the
IEEE 802.16 Wireless Standard operate on 8-bit bytes and allow
"on-the-fly" programmability so that the number of errors corrected, t,
and the block length, N, can be changed on-the-fly on a block by block
basis without the need for any gaps between received words and the
decoder latency/delay is minimized.
ECC Tek's existing RS encoder and decoder designs for NAND Flash correct
t=5 10-bit symbols in error in K‑byte pages where K is 524 bytes.
Designs that handle other t and K values can quickly be developed.
4K‑byte page sizes can be accommodated by repeating 524-byte segments 8
The DVB RS encoder receives 188 bytes of data in a byte-serial fashion
and adds 16 redundant bytes to form a packet of 204 bytes.