Flexibilis Oy

Flexibilis focuses on critical communications and develops solutions based on FPGA technology. The main business is the licensing of intellectual property (IP) cores for device manufacturers. The most important product is the Flexibilis Redundant Switch (FRS), an IP core providing seamless redundancy. Flexibilis’ main values are to develop products that are precise, reliable, and secure.

Product Name: Advanced Flexibilis Ethernet Controller (AFEC)
Product Category: Design Verification

The Advanced Flexibilis Ethernet Controller (AFEC) is a triple-speed (10Mbps/100Mbps/1Gbps) Ethernet controller IP block that can be employed with programmable hardware and ASICs. Together with an Ethernet Physical layer device, AFEC provides the functionality of an Ethernet Network Interface Controller. For connecting to an Ethernet PHY device, AFEC implements a standard MII/GMII interface.

Product Name: Flexibilis Ethernet Switch (FES)
Product Category: Intellectual Property (IP) - ASIC and IC Design

This document describes Flexibilis Ethernet Switch (FES). FES is an Ethernet switch Intellectual Property (IP) core targeted at programmable hardware platforms. It is also possible to integrate FES into an ASIC. FES is written in VHDL language.

Product Name: Flexibilis PTP Protocol Stack
Product Category: Design Verification

The Flexibilis PTP Protocol Stack is an IEEE 1588-2008 compliant implementation of the Precision Time Protocol for clock synchronization over IP and Ethernet. The implementation is written in pure C language, and it is ready to be used in Linux based systems. Hardware and operating system specific details are hidden behind an abstraction layer, so that porting to other operating systems and environments is relatively easy.

Product Name: Flexibilis Redundant Switch
Product Category: Web-based Design Tools


This document describes Flexibilis Redundant Switch (FRS). FRS is an Ethernet switch Intellectual Property (IP) core targeted at programmable hardware platforms. It is also possible to integrate FRS into an ASIC. FRS is written in VHDL language.

Product Name: HSR/PRP Supervision
Product Category: Design Verification

The Flexibilis HSR/PRP Supervision is an IEC 62439-3:2011 compliant implementation of the HSR and PRP Supervision Protocol Stacks. HSR/PRP Supervision generates, transmits, receives and processes HSR and PRP supervision frames. Based on the information in the supervision frames received, HSR/PRP Supervision updates NodesTable that contains information on the other HSR/PRP nodes in the network. This information can be used by other entities including network management and monitoring systems. HSR/PRP Supervision itself does not use the information it collects.

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Url: http://www.flexibilis.com

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