Matches: 6
ASIC and IC Design : Formal Verification

Product Name: SpyGlass-CDC
Company: Atrenta, Inc.

SpyGlass-CDC is the industry’s most comprehensive, practical, and powerful Clock Domain Crossing solution. Spyglass-CDC automatically identifies and formally verifies all synchronization schemes that you throw at it.

Product Name: SpyGlass-Constraints
Company: Atrenta, Inc.

Specify Constraints Early, Validate Continuously & Automate HandoffCreating and ensuring correct and consistent constraints, at all levels of the design hierarchy and throughout the design cycle, is a vital and increasingly challenging task. The difficulties can include: writing new constraints; managing thousands of lines of legacy constraints; managing thousands of timing exceptions across the design flow; unwanted iterations due to changing constraints; and erroneous constraints resulting in redesigns and even re-spins. The SpyGlass® Constraints solution provides a big productivity boost to IC design efforts by automating the creation, validation and management of constraints. The SpyGlass Constraints solution generates new constraints where needed and verifies that existing constraints are correct and consistent across all phases of development: pre-synthesis, pre-layout and post-layout.

Product Name: AFS Nano Block-Level SPICE
Company: Berkeley Design Automation, Inc.

AFS Nano™ is the industry’s fastest SPICE simulator for block-level IC design. Part of the AFS Platform, AFS Nano delivers foundry-certified nanometer SPICE accuracy, 5x-10x faster for blocks with up to 5K elements. A one-year time-based license costs only $1,900 US.

Product Name: JasperGold Apps
Company: Jasper Design Automation, Inc.

JasperGold Apps are based on Jasper's JasperGold technology and are targeted solutions that address specific design and verification challenges. 

Product Name: DiaLite Platform
Company: TEMENTO Systems

The Platform Edition includes all features of the Leading Edge Edition plus the Assertion Checker module. This IP allows the designer to embed his system assertions conditions written along with his system specifications before synthesis and check them at speed.

Product Name: FRstress
Company: Vector Cantech, Inc.

For testing and validating FlexRay systems there is a need forgreater precision in studying a system’ s behavior in response toerrors and disturbances. FRstress generates reproducible disturbanceson a channel in the FlexRay cluster. It can generate protocolerrors as well as disturbances in bus physics that are activated by trigger conditions. This gives the developer and tester a highperformance stress module.

Featured Video
Design Verification Engineer for intersil at Morrisville, NC
Senior Formal FAE Location OPEN for EDA Careers at San Jose or Anywhere, CA
Applications Engineer for intersil at Palm Bay, FL
Senior Electrical Engineer for Allen & Shariff Corporation at Pittsburgh, PA
ASIC Hardware Engineer for BAE Systems Intelligence & Security at Arlington, VA
Upcoming Events
IPC APEX EXPO 2018 at San Diego Convention Center San Diego CA - Feb 24 - 1, 2018
DVCon US 2018 at Double Tree Hotel San Jose CA - Feb 26 - 1, 2018
5th EAI International Conference on Big data and Cloud Computing Challenges at Vandalur, Kelambakkam high road chennai Tamil Nadu India - Mar 8 - 9, 2018

Internet Business Systems © 2018 Internet Business Systems, Inc.
25 North 14th Steet, Suite 710, San Jose, CA 95112
+1 (408) 882-6554 — Contact Us, or visit our other sites:
AECCafe - Architectural Design and Engineering TechJobsCafe - Technical Jobs and Resumes GISCafe - Geographical Information Services  MCADCafe - Mechanical Design and Engineering ShareCG - Share Computer Graphic (CG) Animation, 3D Art and 3D Models
  Privacy PolicyAdvertise